Intel announced addition of 58G PAM4 transceiver technology to its Stratix 10 TX FPGA (field programmable gate array) family, to provide double transceiver bandwidth performance as compared to the traditional solutions.
Integrated with 58 Gbps transceiver, Stratix 10 TX is the fastest FPGA in market as the previous FPGAs offered around 28-30 Gbps of serial data transmission rates.
Intel said that the high bandwidth performance would make Intel Stratix 10 TX FPGAs ideal connectivity solution for cloud service providers, 5G networks, optical transport networks, network function virtualization (NFV), as well as enterprise networking.
Intel’s Stratix FPGAs integrated with PAM4 (pulse amplitude modulation 4), offer up to 144 transceiver lanes, enabling support of around 8 terabytes per second (tbps) of average bandwidth.
With high bandwidth and faster data rate, architects will be able to scale to 100G, 200G, and 400G delivery speeds. All the variants in Intel Stratix 10 FPGA family leverage 14 nm FinFET manufacturing process and incorporate EMIB packaging technology.
“In this smart and connected world, billions of devices are creating massive amounts of data that need faster, flexible and scalable connectivity solutions,” said Reynette Au, vice president of marketing, Intel Programmable Solutions Group. “With Stratix 10 TX FPGAs, Intel continues to provide architects with higher transceiver bandwidth and hardened IP to address the insatiable demand for faster and higher-density connectivity.”
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Along with the 58G PAM4 transceiver technology, Intel will start shipping of all the other Stratix 10 FPGA family variants, which includes FPGAs with embedded quad-core ARM processor, and FPGAs with HBM memory.
Earlier this month, Intel rolled out a new system-on-chip processor called Intel Xeon D-2100 processor to fulfil the requirements of edge applications and network or datacenter applications that are restricted by power and space.
